Abstract
This article shows how fractures in the Si₃N₄ layer, which comprises the top layer of semiconductor devices encapsulated utilizing a lead-on-chip (LOC) packaging technique, are influenced by changes in the lead-frame materials and thermal-cycling test conditions. Using thermal-cycling tests, it was found that fractures in the Si 3 N 4..... More

Abstract
This article details how effectively dicing damage of silicon wafers can be mechanically minimized by appropriate laser-induced groove formation prior to wafer separation. Various laser dicing factors, such as the laser-control power, the scan rate and the scan number of the laser beam, were estimated to determine the optimum groove..... More

Electronic Materials

Abstract
This work details how the sawing velocity influences the chipping damage of semiconductor wafers with different thicknesses during wafer separation. The experimental result shows that at a sawing velocity higher than 60000 rpm, in thinner wafers the magnitude of chipping damage more strongly depends on the revolving velocity of the..... More